The TM NPU offers the usage of sixteen SHAVE (Streaming Hybrid Architecture Vector Engine) vector processors. They can be used by image or computer vision applications, as well as any other general computation-intensive algorithms, to achieve highly optimized scheduling of imaging and computer vision processing pipelines. Furthermore, dedicated hardware accelerators, such as CNN hardware accelerators, ensure rapid execution of neural networks even on multiple threads.
A typical example of using SHAVE processors is to assign them to a SIPP engine (Streaming Image Processing Pipeline). SIPP is a proprietary software/hardware mechanism used by the Intel Movidius Myriad X processor to achieve these kinds of pipelines. The SIPP environment is the development framework for Media sub-system which is a collection of SIPP accelerators. It consists of a complementary collection of hardware image processing filters. These are designed primarily for use within the SIPP software framework. They allow generic or computationally intensive functionality to be offloaded from the SHAVEs. Various hardware image processing filters are available such as Sharpen Filter, Chroma Denoise or Polyphase Scaler.
A particular unit on the SHAVE or hardware accelerator is chosen depending on the specific operation and options that were provided to when compiling the neural network from Intermediate Representation (IR) into machine-readable format on the TM NPU (Intel® Movidius™ binary format). This is done automatically without the need for user intervention.